⚙️ Computer Architecture - CWhiting · Scour

Full Key Recovery of Masked PRESENT on an Out-of-Order RISC-V Processor: A First Reported Case Study 🛡️Exploit Mitigations

eprint.iacr.org·6d

The Universal GPU ISA 🎮GPU Microarchitecture

wave.ojima.me·2d·Hacker News

AMD Formally Announces Ryzen 7 5800X3D 10th Anniversary Edition and Ryzen 7 7700X3D 🔧Hardware

techpowerup.com·5h

Part 7 | Concurrent Tool Execution: How Claude Code Runs Many Tools at Once Without Breaking… 🔀Parallel Algorithms

·1d

Felix86 26.06: Some Gaming 🎯Emulation Accuracy

felix86.com·10h·Hacker News, r/linux_gaming

Difference between revisions of "ELC 2026 Presentations" 🎯Security Conference Talks

Itanium 🖥️Hardware Architecture

en.wikipedia.org·2d·Hacker News

Visualizing How a computer runs a program ⚡Performance Tools

semicolony.dev·5d·Hacker News, r/SideProject

Community Update 🌐Open Source

communityblog.fedoraproject.org·2d

Specification and Formal Verification of Hardware-Software Contracts for High-Assurance Computer Architectures 🧪Hardware Fuzzing

csail.mit.edu·5d

HartBreaker: Deterministic Fuzzing of Multi-Hart RISC-V CPUs with Non-Deterministic Programs 🧪Hardware Fuzzing

comsec.ethz.ch·3d·Hacker News

Alibaba gets Android 16 running on RISC-V 🤖Android

theregister.com·5d

Oabraham1/wave: WAVE (Wide Architecture Virtual Encoding) - The universal GPU ISA. Write GPU kernels once, run on Apple, NVIDIA, AMD, and Intel GPUs. Includes compiler, four backends, emulator, and SDKs for Python, Rust, C++, and TypeScript. 🎮GPU Architecture

github.com·5d·Hacker News

HHK: A Hardware-Oriented Cross-Location PPG Key Generation Architecture for Body Area Networks 🔐Noise Protocol

ByteDance is building its own CPUs on Arm and RISC-V to feed its AI infrastructure 💻China Tech

thenextweb.com·3d

rwilliamspbg-ops/SMIP-MWP-Rust: High-performance, zero-copy AF_XDP networking layer written in Rust. Achieves up to **95+ GiB/s** throughput on modern hardware with a hybrid scalar/tiled buffer engine. 💣Binary Exploitation

github.com·5d·r/rust

Difference between revisions of "File:Riscv-system-emulation.pdf" 💻Terminal Emulators

NVIDIA "Vera" CPU Benchmarked: Beating Intel Xeon and AMD EPYC in Select Workloads 🟩Nvidia

techpowerup.com·5d

A Policy-Driven Runtime Layer for Agentic LLM Serving 🧠Context Engineering

Intel Arc G3 CPU Family Officially Released for Handheld Gaming PCs 📊Gaming Performance

techpowerup.com·3d·r/hardware

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